CMX878 View Datasheet(PDF) - CML Microsystems Plc
Part Name
Description
MFG CO.
'CMX878' PDF : 63 Pages View PDF
Line Powered Modem plus DAA
CMX878
Upon any drop-out of the Standby Supply, this bit will be set to 0 to indicate that the contents of all other
register bits in the Standby Supply Registers cannot be relied upon and are hence termed NOT VALID.
Whenever the device is in this NOT VALID state, it will also set Configuration Register bit 4 to 1 in order
to ensure that the Regulated Supply and microcontroller are powered up.
Whenever the microcontroller reads a NOT VALID state, it should proceed to program the Configuration
Register and the Supplementary Standby Register. Programming the Configuration Register will make
its contents VALID and Line/Wakeup Event Register bit 5 will be set to 1.
Bits 6 and 7. The equivalent logic levels on the ring detector pins RD and RT can be sampled via these
bits.
Bit 8. A ‘Line ADC Drop-out Event’ occurs when the Line ADC voltage has fallen below the programmed
ADC-REF voltage. When Bit 8 goes to 1, Status Register bit 14 will be set to 1 – this will also give an
interrupt if the relevant flag bits are set. The ‘Line ADC Drop-out Event’ is disabled when the ADC
Control Register is set to all 0’s.
Bit 9. The level on the output of the Line ADC comparator.
Bits 0-3 and Bit 8 are cleared after reading this register.
1.5.12.5 Line Control Register
Line Control Register: 8-bit write-only.
C-BUS address $EC
This register controls sets various logic outputs which can be used to control external circuits.
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Logic level CLID Z EN pin (Caller Line ID Z control)
Logic level at GP OP1 pin (a General Purpose logic pin)
Logic level at GP OP2 pin (a General Purpose logic pin)
Logic level at GP OP3 pin (a General Purpose logic pin)
Logic level at GYON (Gyrator Enable)
Reserved for future use. Set to 0.
Reserved for future use. Set to 0.
Reserved for future use. Set to 0.
1.5.12.6 DAC Control Register
DAC Control Register: 8-bit write-only
C-BUS address $ED
Bit: 7 6 5 4 3 2 1 0
Register Value
When the DAC is enabled, the voltage produced is:
AVDD x ( Register Value / 255 )
via an output impedance of approximately 5kΩ.
All bits of this register are cleared to 0 by a General Reset command. A setting of all 0’s will disable and
powersave the DAC.
© 2002 Consumer Microcircuits Limited
31
D/878/2
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