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CMX878D6 View Datasheet(PDF) - CML Microsystems Plc

Part Name
Description
MFG CO.
CMX878D6
CML
CML Microsystems Plc CML
'CMX878D6' PDF : 63 Pages View PDF
Line Powered Modem plus DAA
CMX878
To accommodate the requirements of V.14, the CMX878 Rx Mode Register can be set for 0, +1% or
+2.3% overspeed operation in QAM or DPSK Start-Stop modes. Missing Stop bits beyond those allowed
by the selected overspeed option will set the Rx Framing Error flag bit of the Status Register.
In order that received Break signals can be handled correctly in V.14 Rx overspeed mode, a received
character which has all bits ‘0’, including the Stop and any Parity bits, will always cause the Rx Framing
Error bit to be set and the USART to re-synchronise onto the next ‘1’ – ‘0’ transition. Additionally the
received Continuous 0s detector will respond when more than 2M + 3 consecutive ‘0’s are received,
where ‘M’ is the selected total number of bits per character including Stop and any Parity bits.
1.5.10 DAC
This is an 8-bit linear Digital to Analogue Converter. The primary intended purpose is that it will be used
for controlling a current drawn from the line as part of a line characterisation function; it could, however,
be used for any other purpose if so required. It is powered from the Regulated Supply. The output level
is set by programming the C-BUS DAC Control Register – see the register description for more
information.
Note that when the DAC is enabled, the output impedance is set to a nominal 5k. When used in
conjunction with the circuit in Figure 4a and with the gyrator disabled, the programmed DAC voltage will
give a current out of the ICTRL pin of approximately (DAC voltage – 0.7V) / 5k. The current drawn
from the line will be approximately 200 times this current.
1.5.11 ADC
The Analogue to Digital Converter has two major components: a dedicated 8-bit DAC and a comparator.
See Figure 1c. The comparator compares the output of the DAC (ADC-REF voltage) with the input
signal ADCIN. The output of the comparator is fed to the C-BUS. See also the register description for
more information.
There are two main ways of using this ADC:
i.
Line Drop-out Detection, e.g. testing for an extension going off-hook
Determine the Line voltage at below which the microcontroller needs to be alerted and calculate
the corresponding divided-down voltage at ADCIN. Program ADC-REF to this voltage. Read the
Line/Wakeup Event Register to clear any false drop-out detection which may occur at the
moment when the ADC circuit is programmed. Set mask bits to enable the IRQ.
When the Line voltage drops below the threshold, Line/Wakeup Event Register bit 8 will go to 1,
and consequently so will Status Register bit 14. The microcontroller will then detect the IRQ and
will read the Status Register and the Line/Wakeup Event Register which will indicate the Line
Drop-out Event. As a guard against a false drop-out caused by noise, the microcontroller then
could poll the ADC comparator level (Line/Wakeup Event Register bit 9) to confirm that it is a
reliable 0. Alternatively, it could measure the voltage by using the following successive
approximation technique.
ii.
Line Voltage Measurement using Successive Approximation
By programming successive values of ADC-REF and reading the comparator output (bit 9) from
the Line/Wakeup Event Register, the voltage at ADCIN (and by calculation the Line voltage) can
be determined. The technique for Successive Approximation is:
© 2002 Consumer Microcircuits Limited
24
D/878/2
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