CS22220 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS22220' PDF : 34 Pages View PDF
5.2 PCMCIA Interface Timing Diagrams
PC_A[25:0], PC_NREG
PC_NCE
PC_NOE
PC_NWAIT
PC_D[15:0]
ta(A)
tc(R)
tsu(A)
ta(CE)
tsu(CE)
ta(OE)
tv(WT-OE)
ten(OE)
tw(WT)
th(A)
tv(A)
th(CE)
tdis(CE)
tv(WT)
tdis(OE)
Figure 8. Attribute/Common Memory ‘Read’ Timing Diagram
Table 9. Common Memory ‘Read’ Timing Specification
Speed Version
Symbol
Item
Min
Read Cycle Time
tcR
100
Address Accesss Time
ta (A)
Card Enable Access Time
ta (CE)
Output Enable Access Time
ta (OE)
Output Disable Time from PC_NOE
tdis (OE)
Output Disable Time from PC_NCE
ten (CE)
5
Data Valid from Address Change
tv (A)
0
Address Setup Time
tsu (A)
10
Address Hold Time
th (A)
15
Card Enable Setup Time
tsu (CE)
0
Card Enable Hold Time
th (CE)
15
PC_NWAIT Valid from PC_NOE
tv (WT-OE)
PC_NWAIT Pulse Width
tw (WT)
Data Setup for PC_NWAIT Released
tv (WT)
0
100 ns
Max
100
100
50
50
35
12 us
CS22220 Wireless PCMCIA Controller
27 of 34
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