CS4237B-JQ View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS4237B-JQ' PDF : 114 Pages View PDF
Control Indirect Registers
The Control Indirect registers are accessed
through CTRLbase+3 and CTRLbase+4.
CTRLbase+3 is the address register and
CTRLbase+4 is the data register used to access
C0 through C8 indirect registers.
WSS Master Control (C0)
Default = 0xxxxxxx
D7 D6 D5 D4 D3 D2 D1 D0
RWSS res res res res res res res
res
Reserved. Must write 0. Could read
as 0 or 1.
RWSS
Reset WSS registers. Setting this bit
forces the WSS registers to zero,
then clearing this bit forces the WSS
registers to their default state.
Version / Chip ID (C1)
Default = 11001000
D7 D6 D5 D4 D3 D2 D1 D0
V2 V1 V0 CID4 CID3 CID2 CID1 CID0
CID4-CID0
Chip Identification. Distinguishes
between this chip and other codec
chips that support this register set.
This register is identical to the WSS
X25 register.
01000 - CS4237B
V2-V0
Version number. As enhancements
are made, the version number is
changed so software can distinguish
between the different versions of the
same chip.
100 - Revision A
101 - Revision B
110 - Revision C/D
111 - Revision E
CS4237B
Address
CTRLbase+3
CTRLbase+4
Register Name
Control Indirect Address
Control Indirect Data
Table 22. Control Indirect Access Registers
Index
C0
C1
C2
C3
C4
C5
C6
C7
C8
Register Name
WSS Master Control
Version / Chip ID
3D Space and Center
3D Enable
Consumer Serial Port Enable
Lower Channel Status
Upper Channel Status
Reserved
CS9236 Wavetable Control
Table 23. Control Indirect Registers
DS213PP4
65
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