CS4237B
FSYNC
SCLK
SDOUT
SDIN
...
15 14 13 12 ... 0 15 14
...
16 Bits
Left Data
16 Bits
Right Data
15 14 13 12 ... 0 15 14
...
16 Bits
Left Data
16 Bits
Right Data
0 8 zeros INT 7 zeros CEN PEN OVR 13 zeros
32 Bits
0
INT = Interrupt Bit
CEN = Capture Enable
PEN = Playback Enable
OVR = Left Overrange or
Right Overrange
Figure 9. 64-bit Enhanced Mode (SF1,0 = 00)
FSYNC
SCLK
SDOUT/
SDIN
...
15 14 13 ... 0
16 Clocks
16 Clocks
Left Data
...
15 14 13 ... 0
15
16 Clocks
16 Clocks
Right Data
Figure 10. 64-bit Mode (SF1,0 = 01)
FSYNC
SCLK
...
...
32 No-Clock bit periods
SDOUT/
SDIN
15 14 13
...
0 15 14 13 ... 0
16 Clocks
Left Data
16 Clocks
Right Data
DS213PP4
Figure 11. 32-bit Mode (SF1,0 = 10)
15 14
...
Left Data
77