CS4271-DZZR View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS4271-DZZR' PDF : 53 Pages View PDF
4. TYPICAL CONNECTION DIAGRAM
CS4271
+5 V
* Only one must be used. See
"Grounding and Power Supply
Decoupling."
* 5.1 Ω
∗ Not to exceed 1 µF.
VA
FILT+
0.1 µF
0.1 µF
1 µF
1 µF
+5 V to 3.3 V *
VD
¤ See "Master/Slave Mode Selection".
VL
+5 V to 2.5 V
47 µF
0.1 µF
AGND CS4271
1 µF ∗
0.1 µF
0.1 µF
1 µF
¤ 47 kΩ
VQ1
Power Down
and Mode
Settings
(Control Port)
Analog Input
Buffer
AD0 / CS (I2S/LJ)
SDA / CDIN (M1)
SCL / CCLK (M0)
RST
AINA
AINB
VQ2
VQ3
SDOUT (M/S)
SDIN
MCLK
SCLK
LRCK
AOUTA-
AMUTEC
AOUTA+
40 pF
**
40 pF
** Optional. See "Crystal
Applications (XTI/XTO)".
XTI
XTO
DGND
AOUTB-
BMUTEC
AOUTB+
Audio Data
Processor
Timing Logic
&
Clock
Analog Conditioning
&
Mute
Figure 8. CS4271 Typical Connection Diagram
DS592F1
23
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