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CS42L51-DNZR View Datasheet(PDF) - Cirrus Logic

Part Name
Description
MFG CO.
CS42L51-DNZR
Cirrus-Logic
Cirrus Logic Cirrus-Logic
'CS42L51-DNZR' PDF : 88 Pages View PDF
CS42L51
6.4 Interface Control (Address 04h)
7
6
SDOUT->SDIN
M/S
5
DAC_DIF2
4
DAC_DIF1
SDOUT to SDIN Loopback (SDOUT->SDIN)
3
DAC_DIF0
Default: 0
0 - Disabled; SDOUT internally disconnected from SDIN
1 - Enabled; SDOUT internally connected to SDIN
Function:
Internally loops the signal on the SDOUT pin to SDIN.
Master/Slave Mode (M/S)
Default: 0
0 - Slave
1 - Master
Function:
Selects either master or slave operation for the serial port.
DAC Digital Interface Format (DAC_DIF[2:0])
Default = 000
2
ADC_I²S/LJ
1
DIGMIX
0
MICMIX
DAC_DIF[2:0]
000
001
010
011
100
101
110
100
Description
Left-Justified, up to 24-bit data
I²S, up to 24-bit data
Right-Justified, 24-bit data
Right-Justified, 20-bit data
Right-Justified, 18-bit data
Right-Justified, 16-bit data
Reserved
Reserved
Figure
20 on page 41
19 on page 40
21 on page 41
21 on page 41
21 on page 41
21 on page 41
-
-
Function:
Selects the digital interface format used for the data in on SDIN. The required relationship between the
Left/Right clock, serial clock and serial data is defined by the Digital Interface Format and the options are
detailed in the section “Digital Interface Formats” on page 40.
52
DS679F1
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