CS42L52 View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS42L52

Low-power, Stereo CODEC w/ Headphone & Speaker Amps

Cirrus Logic 

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5/13/08

6.11.4 Invert ADC Signal Polarity

Configures the polarity of the ADC signal.

INV_ADCx

0

1

ADC Signal Polarity

Not Inverted

Inverted

CS42L52

6.11.5 ADC Mute

Configures a digital mute on ADC channel x.

ADCxMUTE

0

1

ADC Mute

Disabled

Enabled

Note: When the ADCxMUTE bit is enabled, the PGA will automatically apply 6 dB of attenuation.

6.12 Playback Control 1 (Address 0Dh)

7

HPGAIN2

6

HPGAIN1

5

4

HPGAIN0 PLYBCKB=A

3

INV_PCMB

2

1

0

INV_PCMA MSTBMUTE MSTAMUTE

6.12.1 Headphone Analog Gain

Selects the gain multiplier for the headphone/line outputs.

HPGAIN[2:0]

000

001

010

011

100

101

110

111

Headphone/Line Gain Setting (G)

0.3959

0.4571

0.5111

0.6047

0.7099

0.8399

1.000

1.1430

Note: Refer to “Line Output Voltage Level Characteristics” on page 20 and “Headphone Output Power

Characteristics” on page 19.

6.12.2 Playback Volume Setting B=A

Configures independent or ganged volume control of all playback channels.

PLYBCKB=A

0

Single Volume Control

Disabled

1

Enabled

Affected Volume Controls

HPxMUTE (“Playback Control 2 (Address 0Fh)” on page 54),

AMIXxVOL[7:0] (“ADC Mixer Channel x Volume” on page 58),

PMIXxVOL[7:0] (“PCM Mixer Channel x Volume” on page 58),

MSTxVOL[7:0] (“Master Volume Control” on page 63),

HPxVOL[7:0] (“Headphone Volume Control” on page 63)

DS680F1

51

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