CS42L52 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS42L52' PDF : 82 Pages View PDF
5/13/08
CS42L52
AGND
FILT+
VQ
MICBIAS
AIN4A,B
AIN3A,B
MIC1+,-
MIC2+,-
MIC2A,B
MIC1A,B
AIN2A,B
AIN1A,B
AFILTA,B
SPKR/HP
RESET
VL
VD
DGND
SDOUT
MCLK
SCLK
SDIN
LRCK
GND/Thermal Pad
17 Analog Ground (Input) - Ground reference for the internal analog section.
18
Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling cir-
cuits.
19 Quiescent Voltage (Output) - Filter connection for the internal quiescent voltage.
20
Microphone Bias (Output) - Low noise bias supply for an external microphone. Electrical charac-
teristics are specified in the DC Electrical Characteristics table.
21,22
23,24
Line-Level Analog Inputs (Input) - Single-ended stereo line-level analog inputs.
21,23
22,24
Differential Microphone Inputs (Input) - Differential stereo microphone inputs.
21,22
23,24
Single-Ended Microphone Inputs (Input) - Single-ended stereo microphone inputs.
25,26
29,30
Line-Level Analog Inputs (Input) - Single-ended stereo line-level analog inputs.
27,28 Anti-alias Filter Connection (Output) - Anti-alias filter connection for the ADC inputs.
31
Speaker/Headphone Switch (Input) - Powers down the left and/or right channel of the speaker
and/or headphone outputs.
32 Reset (Input) - The device enters a low power mode when this pin is driven low.
33
Digital Interface Power (Input) - Determines the required signal level for the serial audio inter-
face and host control port.
34 Digital Power (Input) - Positive power for the internal digital section.
35 Digital Ground (Input) - Ground reference for the internal digital section.
36 Serial Audio Data Output (Output) - Output for two’s complement serial audio data.
37 Master Clock (Input) - Clock source for the delta-sigma modulators.
38 Serial Clock (Input/Output) - Serial clock for the serial audio interface.
39 Serial Audio Data Input (Input) - Input for two’s complement serial audio data.
40
Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on
the serial audio data line.
-
Ground reference for PWM power FETs and charge pump; thermal relief pad for optimized heat
dissipation.
1.1 I/O Pin Characteristics
Input and output levels and associated power supply voltage are shown in the table below. Logic levels
should not exceed the corresponding power supply voltage.
Power Pin Name I/O Internal
Supply
Connections
RESET
Input
-
SCL
Input
-
SDA
Input/
-
Output
MCLK
Input
-
VL
LRCK
Input/ Weak Pullup
Output (~1 MΩ)
SCLK
Input/ Weak Pullup
Output (~1 MΩ)
SDOUT Output Weak Pullup
(~1 MΩ)
SDIN
Input
-
VA
SPKR/HP Input
-
SPKR_OUTA+ Output
-
SPKR_OUTA- Output
-
VP SPKR_OUTB+ Output
-
SPKR_OUTB- Output
-
Driver
-
-
1.65 V - 3.47 V, CMOS/Open
Drain
-
1.65 V - 3.47 V, CMOS
1.65 V - 3.47 V, CMOS
1.65 V - 3.47 V, CMOS
-
-
1.6 V - 5.25 V Power MOSFET
1.6 V - 5.25 V Power MOSFET
1.6 V - 5.25 V Power MOSFET
1.6 V - 5.25 V Power MOSFET
Receiver
1.65 V - 3.47 V, with Hysteresis
1.65 V - 3.47 V, with Hysteresis
1.65 V - 3.47 V, with Hysteresis
1.65 V - 3.47 V
1.65 V - 3.47 V
1.65 V - 3.47 V
1.65 V - 3.47 V
1.65 V - 2.63 V
-
-
-
-
DS680F1
9
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