CS42L56
6.23.3 ADC x Input Select
Selects the specified analog input signal into ADCx.
ADCxMUX[1:0]
00
01
10
11
Selected Input to ADCx
PGAx - Use PGAxMUX bit (“PGA x Input Select” on page 77) to select an input channel.
AIN1x; PGA is bypassed.
AIN2x; PGA is bypassed.
AIN3x; PGA is bypassed.
Note: Pseudo-differential inputs are not available when the PGA is bypassed. Use the AINx_REF bits
(Analog Input 1 x Reference Configuration and “Analog Input 1 x Reference Configuration” on page 74)
to properly configure the input channel.
6.24 HPF Control (Address 1Bh)
7
HPFB
6
HPFRZB
5
HPFA
4
HPFRZA
3
HPFB_CF1
6.24.1 ADCx High-Pass Filter
Configures the internal high-pass filter after ADCx.
HPFx
0
1
High Pass Filter Status
Disabled
Enabled
2
HPFB_CF0
1
HPFA_CF1
0
HPFA_CF0
6.24.2 ADCx High-Pass Filter Freeze
Configures the high pass filter’s digital DC subtraction and/or calibration after ADCx.
HPFRZx
0
1
High Pass Filter Digital Subtraction
Continuous DC Subtraction
Frozen DC Subtraction
6.24.3 HPF x Corner Frequency
Sets the corner frequency (-3 dB point) for the internal High-Pass Filter (HPF).
HPFx_CF[1:0]
00
01
10
11
HPF Corner Frequency Setting (Fs=48 kHz)
1.8 Hz
119 Hz
236 Hz
464 Hz
74
DS851F2