CS4382 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS4382' PDF : 42 Pages View PDF
CS4382
Mode
(sample-rate range)
Sample
Rate
(kHz)
MCLK (MHz)
MCLK Ratio
256x
384x
512x
768x*
Single-Speed
(4 to 50 kHz)
32
8.1920
12.2880
16.3840
24.5760
44.1
11.2896
16.9344
22.5792
33.8688
48
12.2880
18.4320
24.5760
36.8640
MCLK Ratio
128x
192x
256x
384x
Double-Speed
(50 to 100 kHz)
64
88.2
8.1920
11.2896
12.2880
16.9344
16.3840
22.5792
24.5760
33.8688
96
12.2880
18.4320
24.5760
36.8640
MCLK Ratio
64x
96x
128x
192x
Quad-Speed
(100 to 200 kHz)
176.4
192
11.2896
12.2880
16.9344
18.4320
22.5792
24.5760
33.8688
36.8640
Note: *These modes are only available in Control Port Mode by setting the MCLKDIV bit = 1.
Table 5. Common Clock Frequencies
M1
(DIF1)
0
0
1
1
M0
(DIF0)
0
1
0
1
DESCRIPTION
FORMAT
Left Justified, up to 24-bit data
0
I²S, up to 24-bit data
1
Right Justified, 16-bit Data
2
Right Justified, 24-bit Data
3
Table 6. Digital Interface Format, Stand-Alone Mode Options
Control port
only modes
1024x*
32.7680
45.1584
49.1520
512x*
32.7680
45.1584
49.1520
256x*
45.1584
49.1520
FIGURE
33
34
35
36
M3
M2
(DEM)
DESCRIPTION
0
0
Single-Speed without De-Emphasis (4 to 50 kHz sample rates)
0
1
Single-Speed with 44.1 kHz De-Emphasis; see Figure 39
1
0
Double-Speed (50 to 100 kHz sample rates)
1
1
Quad-Speed (100 to 200 kHz sample rates)
Table 7. Mode Selection, Stand-Alone Mode Options
DSD_Mode
(LRCK1)
1
1
1
1
1
1
1
1
M2 M1 M0
DESCRIPTION
0
0
0 64x oversampled DSD data with a 4x MCLK to DSD data rate
0
0
1 Reserved
0
1
0 Reserved
0
1
1 Reserved
1
0
0 128x oversampled DSD data with a 2x MCLK to DSD data rate
1
0
1 Reserved
1
1
0 Reserved
1
1
1 Reserved
Table 8. Direct Stream Digital (DSD), Stand-Alone Mode Options
DS514F2
27
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