CS4382A
+1.8 V to +5 V
+2.5 V
+
1 µF
NoteDSD 47 KΩ
VLS
0.1 µF
4
VD
0.1 µF
32
VA
AOUTA1+ 39
AOUTA1- 40
220 Ω
PCM
Digital
Audio
Source
470 Ω
470 Ω
DSD
Audio
Source
6 MCLK
7 LRCK
9 SCLK
8
SDIN1
11 SDIN2
13 SDIN3
14
SDIN4
AOUTB1+ 38
AOUTB1- 37
MUTEC1 41
AOUTA2+ 35
AOUTA2- 36
43
0.1 µF
3
2
1
48
47
46
45
44
NoteDSD
AOUTB2+ 34
VLS CS4382A AOUTB2- 33
DSDA1
DSDB1
DSDA2
AOUTA3+ 29
AOUTA3- 30
AOUTB3+ 28
AOUTB3- 27
DSDB2
DSDA3
DSDB3
AOUTA4+ 25
AOUTA4- 26
DSDA4
DSDB4
AOUTB4+ 24
AOUTB4- 23
+5 V
+
1 µF
Analog Conditioning
and Muting
Analog Conditioning
and Muting
Mute
Drive
Analog Conditioning
and Muting
Analog Conditioning
and Muting
Analog Conditioning
and Muting
Analog Conditioning
and Muting
Analog Conditioning
and Muting
Analog Conditioning
and Muting
Stand-Alone
Mode
Configuration
Optional
47 KΩ 42 M3(DSD_SCLK)
15 M2
16 M1
17 M0
19
RST
+1.8 V to +5 V
18
VLC
0.1 µF
MUTEC234 22
Mute
Drive
FILT+ 20
VQ 21
0.1 µF + 1 µF
+
0.1 µF 47 µF
GND
5
GND TST
31 10, 12
NoteDSD: For DSD operation:
1) LRCK must be tied to VLS and
remain static high.
2) M3 PCM stand-alone configuration
pin becomes DSD_SCLK
Figure 6. Typical Connection Diagram, Hardware Mode
20
DS618F2