CS4383
+3.3 V to +5 V
1 µF
+
0.1 µF
0.1 µF
NoteDSD 47 K Ω
VLS
4
32
VD
VA
AOUTA1+ 39
AOUTA1- 40
MUTEC1 41
PCM
Digital
A u d io
Source
+1.8 V to +5 V
6
7
9
8
11
12
13
43
0.1 µF
MCLK
LRCK
SCLK
S D IN 1
S D IN 2
S D IN 3
S D IN 4
VLS
AOUTB1+ 38
AOUTB1- 37
MUTEC2 22
AOUTA2+ 35
AOUTA2- 36
AOUTB2+ 34
AOUTB2- 33
CS4383
AOUTA3+ 29
AOUTA3- 30
+
1 µF
+5 V
Analog Conditioning
and Muting
Analog Conditioning
and Muting
Analog Conditioning
and Muting
Analog Conditioning
and Muting
Analog Conditioning
and Muting
DSD
A u d io
Source
3 DSDA1
2 DSDB1
1 DSDA2
48
DSDB2
47
DSDA3
46 DSDB3
45 DSDA4
44 DSDB4
AOUTB3+ 28
AOUTB3- 27
AOUTA4+ 25
AOUTA4- 26
AOUTB4+ 24
AOUTB4- 23
Analog Conditioning
and Muting
Analog Conditioning
and Muting
Analog Conditioning
and Muting
S ta n d -A lo n e
Mode
Configuration
NoteDSD
47 KΩ
42 M3(DSD_SCLK
14 M2
15 M1
16 M0
18 RST
NoteVLC
MUTEC3 19
FILT+ 20
VQ 21
0.1 µ F + 1 µF
+
0.1 µ F 47 µF
+1.8 V to +5 V
NoteVLC: If series resistors are
used they m ust be <1k Ohm . If
possible tie VLC to the VD supply
to reduce possible excess current
consum ption from VLC.
17
0.1 µF
VLC
GND
5
GND
31
NoteDSD: For DSD operation:
1) LRCK m ust be tied to VLS and
rem ain static high.
2) M3 PCM stand-alone configuration
pin becom es DSD_SCLK
Figure 6. Typical Connection Diagram Stand-Alone
13