CS493254-IL View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS493254-IL' PDF : 90 Pages View PDF
CS49300 Family DSP
1.13. Switching Characteristics — Serial Bursty Data Input
(VA, VD[3:1] = 2.5 V ±5%; Inputs: Logic 0 = DGND, Logic 1 = VD, CL = 20 pF)
Parameter
Symbol
Min
Serial compressed data clock CMPCLK period
Tcmpclk
-
CMPDAT setup before CMPCLK high
Tcmpsu
5
CMPDAT hold after CMPCLK high
Tcmphld
3
Delay from falling edge of CMPREQ to CMPCLK rising edge Treqclk
0
Max
27
-
-
-
Notes: 1. CMPREQ signal is asynchronous to CLKIN and can change at any time relative to CLKIN.
CMPREQ
Treqclk
Unit
MHz
ns
ns
ns
CMPCLK
CMPDAT
Tcmpsu
Tcmpclk
Tcmphld
Figure 10. Serial Compressed Data Timing
20
DS339F7
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