CS5165GDWR16 View Datasheet(PDF) - ON Semiconductor
Part Name
Description
MFG CO.
'CS5165GDWR16' PDF : 21 Pages View PDF
PACKAGE PIN #
SO−16L
1, 2, 3, 4, 6
5
7
8
9
10
11
12
13
14
15
16
CS5165
PACKAGE PIN DESCRIPTION
PIN SYMBOL
VID0−VID4
SS
COFF
ENABLE
VCC
GATE(H)
PGND
GATE(L)
PWRGD
LGND
COMP
VFB
FUNCTION
Voltage ID DAC input pins. These pins are internally pulled up to 5.0 V if left open. VID4
selects the DAC range. When VID4 is high (logic one), the Error Amp reference range is
2.14 V to 3.45 V with 100 mV increments. When VID4 is low (logic zero), the Error Amp
reference voltage 1.34 V to 2.09 V with 50 mV increments.
Soft Start Pin. A capacitor from this pin to LGND sets the Soft Start and fault timing.
Off−Time Capacitor Pin. A capacitor from this pin to LGND sets both the normal and
extended off time.
Output Enable Input. This pin is internally pulled up to 1.8 V. A logic Low (< 0.8) on this
pin disables operation and places the CS5165 into a low current sleep mode.
Input Power Supply Pin.
High Side Switch FET driver pin.
High current ground for the GATE(H) and GATE(L) pins.
Low Side Synchronous FET driver pin.
Power Good Output. Open collector output drives low when VFB is out of regulation. Ac-
tive when ENABLE input is low.
Reference ground. All control circuits are referenced to this pin.
Error Amp output. PWM Comparator reference input. A capacitor to LGND provides Error
Amp compensation.
Error Amp, PWM Comparator, and Low VFB Comparator feedback input.
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