CS5368 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS5368' PDF : 42 Pages View PDF
CS5368
4.5.2 TDM Format
In TDM Mode, all eight channels of audio data are serially clocked out during a single Frame Sync (FS)
cycle, as shown in Figure 12. The rising edge of FS signifies the start of a new TDM frame cycle. Each
channel slot occupies 32 SCLK cycles, with the data left justified and with MSB first. TDM output data
should be latched on the rising edge of SCLK within time specified under ”Serial Audio Interface - TDM Tim-
ing” section on page 16. The TDM data output port resides on the SDOUT1 pin. The TDM output pin is
complimentary TDM data. All SDOUT pins will remain active during TDM Mode. Refer to Section 4.11 “Op-
timizing Performance in TDM Mode” on page 29 for critical system design information.
FS
SCLK
TDM OUT
LSB M SB LSB
Channel 1
3 2 c lk s
MSB
LSB M SB
LSB M SB
LSB M SB
LSB M SB
LSB M SB
LSB MSB
LSB M SB
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 7
Channel 8
3 2 c lk s
3 2 c lk s
3 2 c lk s
3 2 c lk s
3 2 c lk s
3 2 c lk s
3 2 c lk s
4.5.3
D a ta
M SB
LSB
Z eroes
Figure 12. TDM Format
Configuring Serial Audio Interface Format
The serial audio interface format of the data is controlled by the configuration of the DIF1 and DIF0 pins in
Stand-Alone Mode or by the DIF[1] and DIF[0] bits in the Global Mode Control Register in Control Port
Mode, as shown in Table 2.
DIF1
0
0
1
1
DIF0
0
1
0
1
Mode
Left-Justified
I²S
TDM
Reserved
4.6 Speed Modes
4.6.1 Sample Rate Ranges
Table 2. DIF1 and DIF0 Pin Settings
CS5368 supports sampling rates from 2 kHz to 21 kHz, divided into three ranges: 2 kHz - 54 kHz, 54 kHz -
108 kHz, and 108 kHz - 216 kHz. These sampling speed modes are called Single-Speed Mode (SSM),
Double-Speed Mode (DSM), and Quad-Speed Mode (QSM), respectively.
4.6.2 Using M1 and M0 to Set Sampling Parameters
The Master/Slave operation and the sample rate range are controlled through the settings of the M1 and
M0 pins in Stand-Alone Mode, or by the M[1] and M[0] bits in the Global Mode Control Register in Control
Port Mode, as shown in Table 3.
M1 M0
0
0
0
1
1
0
1
1
Mode
Single-Speed Master Mode (SSM)
Double-Speed Master Mode (DSM)
Quadruple-Speed Master Mode (QSM)
Auto-Detected Speed Slave Mode
Frequency Range
2 kHz - 54 kHz
54 kHz - 108 kHz
108 kHz - 216 kHz
2 kHz - 216 kHz
Table 3. M1 and M0 Settings
DS624F5
23
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