CS5372 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS5372' PDF : 22 Pages View PDF
CS5371/CS5372
8.2. Low Power Mode - LPWR
The modulators have a low-power operational
mode, LPWR=1 and MCLK=1.024 MHz, that re-
duces power consumption to 15 mW per channel at
the expense of 3 dB of dynamic range. This oper-
ational mode is recommended when minimizing
power is more important than maximizing dynamic
range.
When operated with LPWR=1, the modulator sam-
pling clock (MCLK / 4) must be restricted to rates
of 256 kHz or less, which requires MCLK to run at
1.024 MHz or less. Operating in low power mode
with modulator sample rates greater than 256 kHz
will significantly degrade total harmonic distortion
performance.
8.3. Power Down Mode - PWDN
The modulators have a power down mode,
PWDN=1 and MCLK=Active, that disables the op-
eration of the selected modulator channel and re-
duces its power consumption to 1 mW. Each
modulator has an independent power down pin,
PWDN on the CS5371 and PWDN1, PWDN2 on
the CS5372. Note that when the modulators are
powered down and MCLK is active, the internal
clock generator is still drawing minimal currents.
8.4. Micro Power Mode
Standby power consumption of the modulators can
be minimized by placing them into a micro power
mode, PWDN=1 and MCLK=0. Micro power
mode requires setting the PWDN pin and halting
MCLK to remove the clock generator input current.
Micro power mode consumes only 10 µW of pow-
er.
9. POWER SUPPLY
The CS5371/CS5372 modulators have one positive
analog power supply pin, VA+, one negative ana-
log power supply pin, VA-, one digital power sup-
ply pin, VD, and one digital ground pin, DGND.
The analog and digital circuitry is separated inter-
nally to enhance performance, therefore power
must be supplied to all three supply pins and the
digital ground pin must be referenced to system
ground.
9.1. Power Supply Configurations
The CS5371/CS5372 analog supplies can be pow-
ered by a single +5 V supply and analog ground, or
by dual supplies of + 2.5 V or + 3.0 V. When using
dual supplies, the positive and negative analog
power supplies must be equivalent in voltage but
opposite in polarity and must satisfy the following
conditions:
(VA+) - (VA-) < 6.6 volts
(VD) - (VA-) < 7.6 volts
These conditions permit several power supply con-
figurations.
s VA+ = +5 V;VA- = 0 V;VD+ = +3 V to +5 V
s VA+ = +2.5 V;VA- = -2.5 V;VD+ = +3 V to +5 V
s VA+ = +3 V;VA- = -3 V;VD+ = +3 V
When used with the CS5376 digital filter the max-
imum voltage differential between the modulator
digital supply, VD, and the CS5376 digital supply,
VDD2, must be less than 0.3 V.
9.2. Power Supply Bypassing
The analog and digital supply pins, VA+, VA-, and
VD, should be decoupled to system ground with
0.01 µF and 10 µF capacitors, or with a single
0.1 µF capacitor. Bypass capacitors can be X7R,
tantalum, or any other dielectric types.
9.3. SCR Latch-up Considerations
The VA- pin is tied to the CS5371/CS5372 sub-
strate and should always be connected to the most
negative supply voltage to ensure SCR latch-up
does not occur. In general, latch-up may occur
when any pin voltage is 0.7 V or more below VA-.
DS255PP2
15
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