CS5581 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS5581' PDF : 32 Pages View PDF
3/25/08
14:34
CS5581
Figure 16 illustrates the noise floor of the converter from 0.1 Hz to 100 kHz. While the plot does exhibit
some 1/f noise at lower frequencies, the noise floor is entirely free of spurious frequency content due to
digital activity inside the chip.
Figure 17 illustrates a noise histogram of 4096 samples.
0
-20
-40
-60
-80
-100
-120
-140
-160
0.1
Shorted Input
2M Samples @ 200 kSps
16 Averages
1
10
100
1k
10k
100k
Frequency (Hz)
Figure 16. Spectral Plot of Noise with Shorted Input
900
800
Mean = -0.61
Std. Dev = 2.33
700
600
500
400
300
200
100
0
-8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8
Output (Codes)
Figure 17. Noise Histogram (4096 Conversions)
22
DS796PP1
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