CS61577
CS
SCLK
SDI
t pw2
t pwh2
TCLK
t su2
t h2
TPOS/TNEG
Figure 3. Transmit Clock and Data Switching Characteristics
t cwh
t cc t ch
t cl
t cch
t dc
t cdh
LSB
LSB
t cdh
MSB
CONTROL BYTE
DATA BYTE
Figure 4. Serial Port Write Timing Diagram
CS
SCLK
SDO
CLKE = 1
t cdv
Figure 5. Serial Port Read Timing Diagram
t cdz
HIGH Z
PCS
LEN0/1/2, TAOS,
RLOOP, LLOOP,
RCODE, TCODE
t su4
th4
t pcsl
VALID INPUT DATA
Figure 6. Extended Hardware Mode Parallel Chip Select Timing Diagram
DS155PP2
7