CS7666-KQ View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS7666-KQ' PDF : 42 Pages View PDF
CS7666
Miscellaneous
RESET - Master External Reset Control, PIN 34.
CMOS input which initiates a complete power-on reset, where all registers are reset to their
defaults, and the secondary I2C bus attempts to load any EPROM configuration information.
This pin operates in conjunction with bit 0 of register 00h. RESET is an active logic low input.
ISET – PLL bias , PIN 49.
Connect this pin to analog GND (pin 57) through a 6,000 ohm 1% resistor.
SCANMODE - Test Pin, PIN 53.
Test pin, connect to GND.
TESTPINB - Test Pin, PIN 60.
Test pin, connect to VDD.
TRANSP - Test Pin, PIN 61.
Test pin, connect to VDD.
SCANENABLE - Test Pin, PIN 64.
Test pin, connect to GND.
38
DS302PP1
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