CS8421-CNZR View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS8421-CNZR' PDF : 36 Pages View PDF
3. TYPICAL CONNECTION DIAGRAMS
CS8421
+2.5 V
+3.3 V or +5.0 V
1 kΩ *
0.1 μF
Serial
Audio
Source
**
VD
ILRCK
ISCLK
SDIN
TDM_IN
VL
OLRCK
OSCLK
SDOUT
MS_SEL CS8421
SAIF
XTI
SAOF
SRC_UNLOCK
BYPASS
RST
GND GND
0.1 μF
Serial
Audio
Input
Device
Hardware Control
Settings
Figure 5. Typical Connection Diagram, No External Master Clock
* When no external master clock is supplied to the part, both input and output must be set to Slave Mode for the
part to operate properly. This is done by connecting the MS_SEL pin to ground through a resistance of 0 Ω to 1 kΩ
+ 1% as stated in Table 1, “Serial Audio Port Master/Slave and Clock Ratio Select Start-Up Options (MS_SEL),”
on page 19.
** The connection (VL or GND) and value of these two resistors determines the mode of operation for the input
and output serial ports as described in Table 2 on page 19 and Table 3 on page 19.
DS641F4
15
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