CS8920A View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS8920A

Crystal LAN ISA Plug-and-Play Ethernet Controller

Cirrus Logic 

Prev 31 32 33 34 35 36 37 38 39 40 Next

segment. (Section 7.3.1.2 of ISO/IEC 8802-3,

1993, defines the collision signal as a 10 MHz

+/- 15% signal with a duty cycle no worse than

60/40). When a collision is present, the AUI Col-

lision circuit informs the MAC by asserting the

internal Collision signal.

3.14 External Clock Oscillator

A 20 MHz quartz crystal or CMOS clock input

is required by the CS8920A. If a CMOS clock

input is used, it should be connected the to

XTAL1 pin, with the XTAL2 pin left open. The

clock signal should be 20 MHz ±0.01% with a

duty cycle between 40% and 60%. The specifi-

cations for the crystal are described in section

13.0 (Quartz Crystal Requirements).

CS8920A

38

DS238PP2

Share Link: