CS89712 View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS89712

High-Performance, Low-Power System-on-Chip with 10BASE-T Ethernet Controller

Cirrus Logic 

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CS89712

TIMING CHARACTERISTICS

Characteristics

Negative strobe (nCS[0:5]) zero

wait state read access time

Negative strobe (nCS[0:5]) zero

wait state write access time

Sequential expansion burst mode

read access time

SDRAM cycle time

Access time from RAS

RAS precharge time

CAS pulse width

CAS precharge in page mode

Page mode cycle time

CAS set-up time for auto refresh

RAS pulse width

Symbol

tnCSRD

tnCSWR

tEXBST

tRC

tRAC

tRP

tCAS

tCP

tPC

tCSR

tRAS

18 MHz

Min Max

TBD

TBD

TBD

TBD

-

TBD

-

TBD

-

TBD

-

TBD

-

TBD

-

TBD

-

TBD

-

36 MHz

Min Max

TBD

TBD

TBD

TBD

TBD

TBD

TBD

TBD

TBD

TBD

TBD

Note:

All SDRAM 36 MHz timings are for SDRAM operation.

The values for 36 MHz assume 1 wait state, the 18 MHz values have 0 wait states.

Units

TBD

TBD

TBD

TBD

TBD

TBD

TBD

TBD

TBD

TBD

TBD

DS502PP2

151

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