CSA10.0MTZ View Datasheet(PDF) - Sony Semiconductor
Part Name
Description
MFG CO.
'CSA10.0MTZ' PDF : 25 Pages View PDF
CXP750096/750010, CXP750097/750011
AC Characteristics
(1) Clock timing
(Ta = –20 to +75°C, VDD = 4.5 to 5.5V, Vss = 0V reference)
Item
Symbol Pins
Conditions
Min. Typ. Max Unit
System clock frequency
fC
System clock input pulse width
tXL,
tXH
System clock input rise and fall tCR,
times
tCF
Event count input clock pulse tEH,
width
tEL
Event count input clock rise
tER,
and fall times
tEF
XTAL
EXTAL
EXTAL
EXTAL
EC
Fig. 1, Fig.2
8
Fig. 1, Fig.2
External clock drive
17
Fig. 1, Fig.2
External clock drive
Fig. 3
4tsys∗1
EC
Fig. 3
24 MHz
ns
200 ns
ns
20 ms
System clock frequency
fC
TEX
TX
VDD = 2.7 to 5.5 V
Fig. 2 (32kHz clock
applied conditions)
32.768
kHz
Event count input clock input
pulse width
tTL,
tTH
TEX
Fig. 3
10
µs
Event count input clock rise
and fall times
tTR,
tTF
TEX
Fig. 3
20 ms
∗1 Indicates three values according to the contents of the clock control register (CLC: 000FEh) upper 2 bits
(CPU clock selection).
tsys [ns] = 2000/fc (Upper 2 bits = “00”), 4000/fc (Upper 2 bits = “01”), 16000/fc (Upper 2 bits = “11”)
1/fc
EXTAL
VDD – 0.4V
0.4V
Crystal oscillation
Ceramic oscillation
tXH
tCF
Fig. 1. Clock timing
External clock
tXL
tCR
32kHz clock applied condition
Crystal oscillation
EXTAL XTAL
EXTAL XTAL
TEX
TX
C1
C2
74HC04
C1
C2
Fig.2. Clock applied conditions
TEX
EC
0.8VDD
0.2VDD
tEH
tEF
tEL
tER
tTH
tTF
tTL
tTR
Fig. 3. Event count clock timing
– 16 –
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