Figure 9.10 PCM Interface Slave ....................................................................................................................... 49
Figure 9.11 Long Frame Sync (Shown with 8-bit Companded Sample) ............................................................ 49
Figure 9.12 Short Frame Sync (Shown with 16-bit Sample) .............................................................................. 50
Figure 9.13 Multi-slot Operation with 2 Slots and 8-bit Companded Samples ................................................... 50
Figure 9.14 GCI Interface ................................................................................................................................... 51
Figure 9.15 16-bit Slot Length and Sample Formats .......................................................................................... 52
Figure 9.16 PCM Master Timing Long Frame Sync ........................................................................................... 54
Figure 9.17 PCM Master Timing Short Frame Sync .......................................................................................... 54
Figure 9.18
13 Figure 9.19
20 Figure 9.20
16, Figure 9.21
er Figure 9.22
mb Figure 10.1
pte Figure 10.2
Se Figure 10.3
y, Figure 10.4
nda Figure 10.5
Mo Figure 11.1
- Figure 11.2
.cn Figure 12.1
om Figure 12.2
m.c Figure 16.1
om Figure 16.2
ec Figure 16.3
ch Figure 16.4
apa Figure 16.5
o - Figure 17.1
sa Figure 17.2
PCM Slave Timing Long Frame Sync ............................................................................................. 56
PCM Slave Timing Short Frame Sync ............................................................................................ 56
Digital Audio Interface Modes ......................................................................................................... 58
Digital Audio Interface Slave Timing ............................................................................................... 59
Digital Audio Interface Master Timing ............................................................................................. 60
1.80V and 1.35V Dual-supply Switch-mode System Configuration ................................................ 62
1.80V Parallel-supply Switch-mode System Configuration ............................................................. 63
1.8V Switch-mode Regulator Output Configuration ........................................................................ 64
1.35V Switch-mode Regulator Output Configuration ...................................................................... 65
1.8V and 1.35V Switch-mode Regulators Outputs Parallel Configuration ...................................... 66
Battery Charger Mode-to-Mode Transition Diagram ....................................................................... 71
Battery Charger External Mode Typical Configuration .................................................................... 73
Single Microphone .......................................................................................................................... 74
Stereo Line Input ............................................................................................................................. 75
Programmable Audio Prompts in External SPI Flash ..................................................................... 97
Programmable Audio Prompts in External I²C EEPROM ................................................................ 98
1-mic CVC Block Diagram .............................................................................................................. 99
Configurable EQ GUI with Drag Points ......................................................................................... 103
Volume Boost GUI with Drag Points ............................................................................................. 103
CSR8615 QFN Tape Orientation .................................................................................................. 105
Reel Dimensions ........................................................................................................................... 107
List of Tables d for james T Table 3.1
re Table 3.2
epa Table 3.3
Pr Table 3.4
Typical On-chip Capacitance Values ............................................................................................... 25
Transconductance and On-chip Parasitic Capacitance ................................................................... 26
Crystal Specification ......................................................................................................................... 27
External Clock Specifications ........................................................................................................... 28
Table 7.1 PS Keys for UART/PIO Multiplexing ................................................................................................ 32
Table 7.2 Possible UART Settings ................................................................................................................... 33
Table 7.3 Standard Baud Rates ....................................................................................................................... 34
Table 8.1 Alternative PIO Functions ................................................................................................................. 36
Table 9.1 Alternative Functions of the Digital Audio Bus Interface on the PCM1 Interface ............................. 38
Table 9.2 ADC Audio Input Gain Rate ............................................................................................................. 41
Table 9.3 DAC Digital Gain Rate Selection ...................................................................................................... 42
Table 9.4 DAC Analogue Gain Rate Selection ................................................................................................. 42
Table 9.5 Side Tone Gain ................................................................................................................................ 46
Table 9.6 PCM Master Timing .......................................................................................................................... 53
Table 9.7 PCM Slave Timing ............................................................................................................................ 55
Pre-production Information
© Cambridge Silicon Radio Limited 2013
Confidential Information - This Material is Subject to CSR's Non-disclosure Agreement
Page 12 of 114
CS-303726-DSP3
www.csr.com