CSR8615A04-IQQF-R View Datasheet(PDF) - Unspecified
Part Name
Description
MFG CO.
'CSR8615A04-IQQF-R' PDF : 114 Pages View PDF
7.3 Programming and Debug Interface ...................................................................................................... 34
7.3.1 Multi-slave Operation ............................................................................................................. 34
7.4 I²C EEPROM Interface ........................................................................................................................ 35
8 Interfaces ...................................................................................................................................................... 36
8.1 Programmable I/O Ports, PIO .............................................................................................................. 36
8.2 Analogue I/O Ports, AIO ...................................................................................................................... 36
8.3 LED Drivers ......................................................................................................................................... 37
9 Audio Interface .............................................................................................................................................. 38
9.1
9.2
9.3
Audio Input and Output ........................................................................................................................ 39
13 Audio Codec Interface ......................................................................................................................... 39
20 9.2.1 Audio Codec Block Diagram .................................................................................................. 39
16, 9.2.2 ADC ........................................................................................................................................ 40
er 9.2.3 ADC Sample Rate Selection .................................................................................................. 40
mb 9.2.4 ADC Audio Input Gain ............................................................................................................ 40
pte 9.2.5 ADC Pre-amplifier and ADC Analogue Gain .......................................................................... 40
Se 9.2.6 ADC Digital Gain .................................................................................................................... 40
y, 9.2.7 ADC Digital IIR Filter .............................................................................................................. 41
nda 9.2.8 DAC ........................................................................................................................................ 41
Mo 9.2.9 DAC Sample Rate Selection .................................................................................................. 41
- 9.2.10 DAC Digital Gain .................................................................................................................... 41
.cn 9.2.11 DAC Analogue Gain ............................................................................................................... 42
om 9.2.12 DAC Digital FIR Filter ............................................................................................................. 42
m.c 9.2.13 Microphone Input ................................................................................................................... 43
om 9.2.14 Line Input ............................................................................................................................... 43
ec 9.2.15 Output Stage .......................................................................................................................... 44
ch 9.2.16 Side Tone ............................................................................................................................... 45
apa 9.2.17 Integrated Digital IIR Filter ..................................................................................................... 46
o - PCM1 Interface .................................................................................................................................... 47
sa 9.3.1 PCM Interface Master/Slave .................................................................................................. 48
s T 9.3.2 Long Frame Sync ................................................................................................................... 49
me 9.3.3 Short Frame Sync .................................................................................................................. 50
r ja 9.3.4 Multi-slot Operation ................................................................................................................ 50
fo 9.3.5 GCI Interface .......................................................................................................................... 51
red 9.3.6 Slots and Sample Formats ..................................................................................................... 51
pa 9.3.7 Additional Features ................................................................................................................ 52
Pre 9.3.8 PCM Timing Information ........................................................................................................ 53
9.3.9 PCM_CLK and PCM_SYNC Generation ................................................................................ 56
9.3.10 PCM Configuration ................................................................................................................. 57
9.4 Digital Audio Interface (I²S) .................................................................................................................. 57
10 Power Control and Regulation ...................................................................................................................... 61
10.1 1.8V Switch-mode Regulator ............................................................................................................... 64
10.2 1.35V Switch-mode Regulator ............................................................................................................. 64
10.3 1.8V and 1.35V Switch-mode Regulators Combined .......................................................................... 65
10.4 Bypass LDO Linear Regulator ............................................................................................................. 66
10.5 Low-voltage VDD_DIG Linear Regulator ............................................................................................. 67
10.6 Low-voltage VDD_AUX Linear Regulator ............................................................................................ 67
10.7 Low-voltage VDD_ANA Linear Regulator ............................................................................................ 67
Pre-production Information
© Cambridge Silicon Radio Limited 2013
Confidential Information - This Material is Subject to CSR's Non-disclosure Agreement
Page 9 of 114
CS-303726-DSP3
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