Pin
XTAL
EXTAL
RST
PWE
CXP973F064
EXTAL
Circuit format
IP
Timing
generator
After a reset
Oscillation
stop control
XTAL
• Diagram shows circuit configuration during oscillation.
• Feedback resistor is reoved during standby stop mode,
and XTAL is driven at "H" level.
Mask option ∗
OP
RST
IP
Internal reset circuit
CMOS Schmitt input
∗ Pull-up transistor
approximately 30kΩ (VDD = 2.7 to 3.6V)
Oscillation
"L" level
(during a reset)
PWE
IP
FLASH EEPROM
Hi-Z
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