CY7C1019CV33-10ZXC View Datasheet(PDF) - Cypress Semiconductor
Part Name
Description
MFG CO.
'CY7C1019CV33-10ZXC' PDF : 10 Pages View PDF
Switching Waveforms
Read Cycle No. 1[11, 12]
tRC
ADDRESS
DATA OUT
tAA
tOHA
PREVIOUS DATA VALID
Read Cycle No. 2 (OE Controlled)[12, 13]
CY7C1019CV33
DATA VALID
ADDRESS
CE
OE
DATA OUT
VCC
SUPPLY
CURRENT
tRC
tACE
tDOE
tLZOE
HIGH IMPEDANCE
tLZCE
tPU
50%
Write Cycle No. 1 (CE Controlled)[14, 15]
DATA VALID
tHZOE
tHZCE
HIGH
IMPEDANCE
tPD
ICC
50%
ISB
ADDRESS
CE
WE
DATA I/O
tWC
tSCE
tSA
tSCE
tAW
tHA
tPWE
tSD
tHD
DATA VALID
Notes:
11. Device is continuously selected. OE, CE = VIL.
12. WE is HIGH for read cycle.
13. Address valid prior to or coincident with CE transition LOW.
14. Data I/O is high impedance if OE = VIH.
15. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
Document #: 38-05130 Rev. *F
Page 5 of 10
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