CY7C1344F View Datasheet(PDF) - Cypress Semiconductor
Part Name
Description
MFG CO.
'CY7C1344F' PDF : 15 Pages View PDF
Switching Characteristics Over the Operating Range[10, 11]
Parameter
Description
Set-up Times
tAS
tADS
tADVS
tWES
tDS
tCES
Hold Times
Address Set-up before CLK Rise
ADSP, ADSC Set-up before CLK Rise
ADV Set-up before CLK Rise
GW, BWE, BW[A:D] Set-up before CLK Rise
Data Input Set-up before CLK Rise
Chip Enable Set-up
tAH
tADH
tWEH
tADVH
tDH
tCEH
Address Hold after CLK Rise
ADSP, ADSC Hold after CLK Rise
GW,BWE, BW[A:D] Hold aAfter CLK Rise
ADV Hold after CLK Rise
Data Input Hold after CLK Rise
Chip Enable Hold after CLK Rise
CY7C1344F
117 MHz
100 MHz
Min.
Max.
Min.
Max.
Unit
2.0
2.0
ns
2.0
2.0
ns
2.0
2.0
ns
2.0
2.0
ns
2.0
2.0
ns
2.0
2.0
ns
0.5
0.5
ns
0.5
0.5
ns
0.5
0.5
ns
0.5
0.5
ns
0.5
0.5
ns
0.5
0.5
ns
Document #: 38-05432 Rev. *A
Page 9 of 15
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