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CY7C4241-10AXC View Datasheet(PDF) - Cypress Semiconductor

Part Name
Description
MFG CO.
CY7C4241-10AXC
Cypress
Cypress Semiconductor Cypress
'CY7C4241-10AXC' PDF : 20 Pages View PDF
CY7C4421/4201/4211/4221
CY7C4231/4241/4251
Programmable Flag (PAE, PAF) Operation
Whether the flag offset registers are programmed as de-
scribed in Table 1 or the default values are used, the program-
mable almost-empty flag (PAE) and programmable almost-full
flag (PAF) states are determined by their corresponding offset
registers and the difference between the read and write point-
ers.
Table 1. Writing the Offset Registers
LD WEN WCLK[25]
Selection
00
Empty Offset (LSB)
Empty Offset (MSB)
Full Offset (LSB)
Full Offset (MSB)
01
No Operation
10
Write Into FIFO
The number formed by the empty offset least significant bit
register and empty offset most significant register is referred
to as n and determines the operation of PAE. PAE is synchro-
nized to the LOW-to-HIGH transition of RCLK by one flip-flop
and is LOW when the FIFO contains n or fewer unread words.
PAE is set HIGH by the LOW-to-HIGH transition of RCLK when
the FIFO contains (n+1) or greater unread words.
The number formed by the full offset least significant bit regis-
ter and full offset most significant bit register is referred to as
m and determines the operation of PAF. PAE is synchronized
to the LOW-to-HIGH transition of WCLK by one flip-flop and is
set LOW when the number of unread words in the FIFO is
greater than or equal to CY7C4421. (64 – m), CY7C4201
(256 – m), CY7C4211 (512 – m), CY7C4221 (1K – m),
CY7C4231 (2K – m), CY7C4241 (4K – m), and CY7C4251
(8K – m). PAF is set HIGH by the LOW-to-HIGH transition of
WCLK when the number of available memory locations is
greater than m.
11
No Operation
Table 2. Status Flags
CY7C4421
0
1 to n[26]
(n+1) to 32
33 to (64 – (m+1))
(64 – m)[27] to 63
64
Number of Words in FIFO
CY7C4201
0
1 to n[26]
(n+1) to 128
129 to (256 – (m+1))
(256 – m)[27] to 255
256
CY7C4211
0
1 to n[26]
(n+1) to 256
257 to (512 – (m+1))
(512 – m)[27] to 511
512
FF PAF PAE EF
H
H
L
L
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
L
L
H
H
Number of Words in FIFO
CY7C4221
CY7C4231
CY7C4241
CY7C4251
FF PAF PAE EF
0
1 to n[26]
0
1 to n[26]
0
1 to n[26]
0
1 to n[26]
HH
L
L
HH
L
H
(n+1) to 512
(n+1) to 1024
(n+1) to 2048
(n+1) to 4096
HH H H
513 to (1024 – (m+1)) 1025 to (2048 – (m+1)) 2049 to (4096 – (m+1)) 4097 to (8192 – (m+1)) H H H H
(1024 – m)[27] to 1023 (2048 – m)[27] to 2047 (4096 – m)[27] to 4095 (8192 – m)[27] to 8191
H
L
H
H
1024
2048
4096
8192
LL
H
H
Notes:
25. The same selection sequence applies to reading from the registers. REN1 and REN2 are enabled and a read is performed on the LOW-to-HIGH transition of RCLK.
26. n = Empty Offset (n=7 default value).
27. m = Full Offset (m=7 default value).
14
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