CY8C20110 View Datasheet(PDF) - Cypress Semiconductor
Part Name
Description
MFG CO.
'CY8C20110' PDF : 46 Pages View PDF
CY8C20110, CY8C20180
CY8C20160, CY8C20140
CY8C20142
Registers
Register Map
Name
INPUT_PORT0
INPUT_PORT1
STATUS_POR0
STATUS_POR1
OUTPUT_PORT0
OUTPUT_PORT1
CS_ENABL0
CS_ENABLE
GPIO_ENABLE0
GPIO_ENABLE1
INVERSION_MASK0
INVERSION_MASK1
INT_MASK0
INT_MASK1
STATUS_HOLD_MSK0
STATUS_HOLD_MSK1
DM_PULL_UP0
DM_STRONG0
DM_HIGHZ0
DM_OD_LOW0
DM_PULL_UP1
DM_STRONG1
DM_HIGHZ1
DM_OD_LOW1
PWM_ENABLE0[18]
PWM_ENABLE1[18]
PWM_MODE_DC[18]
PWM_DELAY[18]
OP_SEL_00
OPR1_PRT0_00
OPR1_PRT1_00
OPR2_PRT0_00
OPR2_PRT1_00
OP_SEL_01
OPR1_PRT0_01
OPR1_PRT1_01
OPR2_PRT0_01
OPR2_PRT1_01
OP_SEL_02
Register
Address
(in Hex)
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
12
13
14
15
16
17
18
19
1A
1B
1C
1D
1E
1F
20
21
22
23
24
25
26
Access
R
R
R
R
W
W
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Writable Only in
SETUP Mode [16]
Factory Default
Values of Registers
(in Hex)
–
00
–
00
–
00
–
00
–
00
–
00
YES
00
YES
00
YES
00
YES
00
–
00
–
00
YES
00
YES
–
–
00
03/1F [17]
03/1F [17]
YES
00
YES
00
YES
00
YES
00
YES
00
YES
00
YES
00
YES
00
–
00
–
00
–
00
–
00
–
00
–
00
–
00
–
00
–
00
–
00
–
00
–
00
–
00
–
00
–
00
I2C Max ACK
Time in Normal
Mode (ms)
0.1
0.1
0.1
0.1
0.1
0.1
–
–
–
–
0.11
0.11
–
–
0.11
0.11
–
–
–
–
–
–
–
–
0.1
0.1
0.1
0.1
0.12
0.12
0.12
0.12
0.12
0.12
0.12
0.12
0.12
0.12
0.12
I2C Max ACK
Time in Setup
Mode (ms)
–
–
–
–
–
–
11
11
11
11
–
–
11
11
–
–
11
11
11
11
11
11
11
11
–
–
–
–
11
11
11
11
11
11
11
11
11
11
11
Notes
16. These registers are writable only after entering into setup mode. All the other registers available for read and write in Normal as well as in Setup mode.
17. The factory defaults of Reg 0x0E and 0x0F is 0x03 for 20142 device and 0x1F for 20140/60/80/10 devices.
18. Errata: These registers are available only in CY8C20110. For more information, see “Errata” on page 41.
Document Number: 001-54606 Rev. *J
Page 13 of 46
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