CY8C20110-LDX1I View Datasheet(PDF) - Cypress Semiconductor
Part Name
Description
MFG CO.
'CY8C20110-LDX1I' PDF : 46 Pages View PDF
CY8C20110, CY8C20180
CY8C20160, CY8C20140
CY8C20142
Pinouts -16-Pin QFN
Figure 1. 16-pin QFN (3 × 3 × 0.6 mm) (no e-pad) pinout [1]
QFN
Pin Definitions
16-pin QFN (no e-pad) [1, 2]
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name
GP0[0]
GP0[1]
I2C SCL
I2C SDA
GP1[0]
GP1[1] [3]
VSS
GP1[2] [3]
GP1[3]
GP1[4]
XRES
GP0[2]
VDD
GP0[3]
CSInt
GP0[4]
Description
Configurable as CapSense or GPIO
Configurable as CapSense or GPIO
I2C clock
I2C data
Configurable as CapSense or GPIO
Configurable as CapSense or GPIO
Ground connection
Configurable as CapSense or GPIO
Configurable as CapSense or GPIO
Configurable as CapSense or GPIO
Active high external reset with internal pull-down
Configurable as CapSense or GPIO
Supply voltage
Configurable as CapSense or GPIO
Integrating capacitor Input. The external capacitance is required only if 5:1 SNR cannot be achieved.
Typical range is 1 nF to 4.7 nF
Configurable as CapSense or GPIO
Notes
1. CY8C20110 (10 Buttons) / CY8C20180 (8 Buttons) / CY8C20160 (6 Buttons) / CY8C20140 (4 Buttons)
2. 8/6/4 available configurable IOs can be configured to any of the 10 IOs of the package. After any of the 8/6/4 IOs are chosen, the remaining 2/4/6 IOs of the package
are not available for any functionality.
3. Avoid using GP1[1] and GP1[2] for driving LEDs. These two pins have special functions during power-up which is used at factory. LEDs connected to these two pins
blink during the power-up of the device.
Document Number: 001-54606 Rev. *J
Page 3 of 46
Share Link: 
