DM9081F View Datasheet(PDF) - Unspecified
Part Name
Description
MFG CO.
'DM9081F' PDF : 22 Pages View PDF
DM9081
Pin Description
Pin No.
Pin Name
I/O
Description
Miscellaneous
3, 4, 9, 30,
DVDD
P Digital Power
40, 50, 83,
93
14, 21, 35,
DGND
P Digital Ground
45, 88, 98
18
RESET#
I Active low to reset the internal logic of DM9081. It should be synchronized to
X2 if multiple DM9081s
are used
20, 19
TESTPIN0
I These two pins are used to select LED display mode. Normal mode is selected
TESTPIN1
if both pins are connected to VDD. Minimum mode is selected if both pins are
connected to GND. Other settings are prohibited
26, 29
NC
- These pins should be left open
27
X2
I A 20MHz oscillator or crystal should be attached to this pin
28
X1
O This pin is used in crystal connection only. It is left open when using an
oscillator
67, 81
AVDD
P Analog Power
68, 82
AGND
P Analog Ground
LED Display Pins
5
LED_LATCH O This pin is used to latch the serial LED information from pins 6 to 13
(LI/RX7)
In minimum mode, this pin sends out TP7 Link and Carrier Sense status
6
AUI_LED
O This pin transmits AUI port status synchronous to TCK
(LI/RX6)
In minimum mode, this pin sends out TP6 Link and Carrier Sense status
7
TP_BIT_LED O This pin sends out global bit rate error status of the DM9081 Hub
(LI/RX5)
In minimum mode, this pin sends out TP5 Link and Carrier Sense status
8
TP_POL_LED O In minimum mode, this pin sends out TP4 Link and Carrier Sense status
(LI/RX4)
10
TP_JAB_LED O This pin transmits global jabber status of the DM9081 Hub
(LI/RX3)
In minimum mode, this pin sends out TP3 Link and Carrier Sense status
11
TRAFFIC_LED O This pin sends out utilization of 10MHz bandwidth synchronous to TCK
(LI/RX2)
In minimum mode, this pin sends out TP2 Link and Carrier Sense status
12
TP_PAR_LED O This pin sends out the partition status synchronous to TCK for the eight TP
(LI/RX1)
ports
In minimum mode, this pin sends out TP1 Link and Carrier Sense status
13
TP_LINK_LED O This pin sends out the link and carrier sense status synchronous to TCK for
(LI/RX0)
the eight TP ports
In minimum mode, this pin sends out TP0 Link and Carrier Sense status
15
AUI1_CRS_LED O Active low for 52ms when AUI Port 1 detects carrier
16
AUI2_CRS_LED O Active low for 52ms when AUI Port 2 detects carrier
17
COL_LED
O Active low for 26ms when collision is detected
25
TCK
O A 10MHz clock synchronous to X2
Final
5
Version: DM9081-DS-F01
April 22, 1997
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