DS3232 View Datasheet(PDF) - Maxim Integrated
Part Name
Description
MFG CO.
'DS3232' PDF : 19 Pages View PDF
Extremely Accurate I2C RTC with
Integrated Crystal and SRAM
Aging Offset (10h)
NAME:
POR*:
BIT 7
SIGN
0
BIT 6
DATA
0
BIT 5
DATA
0
BIT 4
DATA
0
BIT 3
DATA
0
BIT 2
DATA
0
BIT 1
DATA
0
BIT 0
DATA
0
Temperature Register (Upper Byte) (11h)
NAME:
POR*:
BIT 7
SIGN
0
BIT 6
DATA
0
BIT 5
DATA
0
BIT 4
DATA
0
BIT 3
DATA
0
BIT 2
DATA
0
BIT 1
DATA
0
BIT 0
DATA
0
Temperature Register (Lower Byte) (12h)
NAME:
POR*:
BIT 7
DATA
0
BIT 6
DATA
0
BIT 5
0
0
BIT 4
0
0
BIT 3
0
0
BIT 2
0
0
BIT 1
0
0
BIT 0
0
0
SRAM (14h–FFh)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
NAME:
D7
D6
D5
D4
D3
POR*:
X
X
X
X
X
*POR is defined as the first application of power to the device, either VBAT or VCC.
BIT 2
D2
X
BIT 1
D1
X
BIT 0
D0
X
Aging Offset Register
The aging offset register provides an 8-bit code to add
to or subtract from the oscillator capacitor array. The
data is encoded in two’s complement, with bit 7 repre-
senting the sign bit. One LSB represents the smallest
capacitor to be switched in or out of the capacitance
array at the crystal pins. The offset register is added to
the capacitance array during a normal temperature
conversion, if the temperature changes from the previ-
ous conversion, or during a manual user conversion
(setting the CONV bit). To see the effects of the aging
register on the 32kHz output frequency immediately, a
manual conversion should be started after each aging
offset register change.
Positive aging values add capacitance to the array,
slowing the oscillator frequency. Negative values
remove capacitance from the array, increasing the
oscillator frequency.
The change in ppm per LSB is different at different tem-
peratures. The frequency vs. temperature curve is shift-
ed by the values used in this register. At +25°C, one LSB
typically provides about 0.1ppm change in frequency.
Temperature Registers (11h–12h)
Temperature is represented as a 10-bit code with a res-
olution of +0.25°C and is accessible at location 11h and
12h. The temperature is encoded in two’s complement
format, with bit 7 in the MSB representing the sign bit.
The upper 8 bits are at location 11h and the lower 2 bits
are in the upper nibble at location 12h. Upon power
reset, the registers are set to a default temperature of
0°C and the controller starts a temperature conversion.
New temperature readings are stored in this register.
I2C Serial Data Bus
The DS3232 supports a bidirectional I2C bus and data
transmission protocol. A device that sends data onto the
bus is defined as a transmitter and a device receiving
data is defined as a receiver. The device that controls the
message is called a master. The devices that are con-
trolled by the master are slaves. The bus must be con-
trolled by a master device that generates the serial clock
(SCL), controls the bus access, and generates the START
and STOP conditions. The DS3232 operates as a slave
on the I2C bus. Connections to the bus are made through
the SCL input and open-drain SDA I/O lines. Within the
bus specifications, a standard mode (100kHz maximum
clock rate) and a fast mode (400kHz maximum clock rate)
are defined. The DS3232 works in both modes.
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