DS3232M
±5ppm, I2C Real-Time Clock with SRAM
Timing Diagrams
SDA
tBUF
tLOW
SCL
tHD:STA
tR
STOP
START
NOTE: TIMING IS REFERENCED TO VILMAX AND VIHMIN.
Figure 1. I2C Timing
tHD:DAT
tF
tHIGH
tSU:DAT
tHD:STA
tSU:STA
REPEATED
START
tVCCF
VPFMAX
VPFMIN
VCC
RST
Figure 2. Power Switch Timing
RST
PBDB
tRST
Figure 3. Pushbutton Reset Timing
tSP
tSU:STO
tVCCR
tREC
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