DS3232SN View Datasheet(PDF) - Maxim Integrated
Part Name
Description
MFG CO.
'DS3232SN' PDF : 19 Pages View PDF
Extremely Accurate I2C RTC with
Integrated Crystal and SRAM
Figure 1. Address Map for DS3232 Timekeeping Registers and SRAM
ADDRESS
00h
01h
BIT 7
MSB
0
0
02h
0
03h
0
04h
0
BIT 6 BIT 5 BIT 4
10 Seconds
12/24
10 Minutes
AM/PM
10 Hour
10 Hour
0
0
0
0
10 Date
BIT 3
0
BIT 2 BIT 1
Seconds
Minutes
BIT 0
LSB
Hour
Day
Date
FUNCTION
Seconds
Minutes
Hours
Day
Date
RANGE
00–59
00–59
1–12 + AM/PM
00–23
1–7
1–31
05h Century
0
0 10 Month
Month
Month/
Century
01–12 +
Century
06h
10 Year
Year
Year
00–99
07h
A1M1
10 Seconds
Seconds
Alarm 1 Seconds
00–59
08h
A1M2
10 Minutes
09h
A1M3
12/24
AM/PM
10 Hour
10 Hour
Minutes
Hour
Alarm 1 Minutes
Alarm 1 Hours
00–59
1–12 + AM/PM
00–23
0Ah
A1M4 DY/DT
10 Date
Day
Date
Alarm 1 Day
Alarm 1 Date
1–7
1–31
0Bh
A2M2
10 Minutes
0Ch
A2M3
12/24
AM/PM
10 Hour
10 Hour
Minutes
Hour
Alarm 2 Minutes
Alarm 2 Hours
00–59
1–12 + AM/PM
00–23
0Dh
A2M4 DY/DT
10 Date
0Eh
EOSC BBSQW CONV
RS2
Day
Alarm 2 Day
Date
Alarm 2 Date
RS1 INTCN A2IE A1IE
Control
1–7
1–31
—
0Fh
OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F Control/Status
—
10h
SIGN DATA DATA DATA DATA DATA DATA DATA Aging Offset
—
11h
SIGN DATA DATA DATA DATA DATA DATA DATA MSB of Temp
—
12h
DATA DATA
0
0
0
0
0
0
LSB of Temp
—
13h
0
0
0
0
0
0
0
0
Not used
Reserved for
test
14h–0FFh
x
x
x
x
x
x
x
x
SRAM
00h–0FFh
Note: Unless otherwise specified, the registers’ state is not defined when power is first applied.
event, it is possible that the microcontroller and DS3232
I2C communications could become unsynchronized,
e.g., the microcontroller resets while reading data from
the DS3232. When the microcontroller resets, the
DS3232 I2C interface may be placed into a known state
by toggling SCL until SDA is observed to be at a high
level. At that point the microcontroller should pull SDA
low while SCL is high, generating a START condition.
If SCL is held low for greater than tIF, the internal I2C
interface is reset. This limits the minimum frequency at
which the I2C interface can be operated. If data is
being written to the device when the interface timeout is
exceeded, prior to the acknowledge, the incomplete
byte of data is not written.
Clock and Calendar
The time and calendar information is obtained by read-
ing the appropriate register bytes. Figure 1 illustrates
the RTC registers. The time and calendar data are set
or initialized by writing the appropriate register bytes.
The contents of the time and calendar registers are in
binary-coded decimal (BCD) format. The DS3232 can
be run in either 12-hour or 24-hour mode. Bit 6 of the
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