DSPIC30F2011CT-20I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

MFG CO.

DSPIC30F2011CT-20I/SO

High-Performance, 16-bit Digital Signal Controllers

Microchip Technology 

Prev 101 102 103 104 105 106 107 108 109 110 Next

TABLE 15-1: UART1 REGISTER MAP FOR dsPIC30F2011/2012/3012/3013

SFR Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8

Bit 7

Bit 6

Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Reset State

U1MODE

U1STA

U1TXREG

U1RXREG

U1BRG

Legend:

020C UARTEN — USIDL —

—

ALTIO

020E UTXISEL —

—

— UTXBRK UTXEN

0210

—

—

—

—

—

—

0212

—

—

—

—

—

—

0214

u = uninitialized bit; — = unimplemented bit, read as ‘0’

—

—

WAKE LPBACK ABAUD —

—

UTXBF TRMT URXISEL1 URXISEL0 ADDEN RIDLE PERR

—

UTX8

Transmit Register

—

URX8

Receive Register

Baud Rate Generator Prescaler

PDSEL1 PDSEL0 STSEL 0000 0000 0000 0000

FERR OERR URXDA 0000 0001 0001 0000

0000 000u uuuu uuuu

0000 0000 0000 0000

0000 0000 0000 0000

TABLE 15-2: UART2 REGISTER MAP FOR dsPIC30F3013(1)

SFR

Name

Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Reset State

U2MODE

U2STA

U2TXREG

U2RXREG

U2BRG

Legend:

Note 1:

2:

0216 UARTEN — USIDL —

—

—

—

—

WAKE LPBACK

0218 UTXISEL —

—

— UTXBRK UTXEN UTXBF TRMT URXISEL1 URXISEL0

021A

—

—

—

—

—

—

—

UTX8

021C

—

—

—

—

—

—

—

URX8

021E

Baud Rate Generator Prescaler

u = uninitialized bit; — = unimplemented bit, read as ‘0’

UART2 is not available on dsPIC30F2011/2012/3012 devices.

Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.

ABAUD —

—

ADDEN RIDLE PERR

Transmit Register

Receive Register

PDSEL1 PDSEL0

FERR OERR

STSEL 0000 0000 0000 0000

URXDA 0000 0001 0001 0000

0000 000u uuuu uuuu

0000 0000 0000 0000

0000 0000 0000 0000

Share Link: