DSPIC33FJ06GS101 View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'DSPIC33FJ06GS101' PDF : 346 Pages View PDF
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 7-16: IEC5: INTERRUPT ENABLE CONTROL REGISTER 5
R/W-0
R/W-0
U-0
U-0
U-0
U-0
U-0
PWM2IE(1) PWM1IE
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
—
bit 7
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
U-0
U-0
—
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13-0
PWM2IE: PWM2 Interrupt Enable bit(1)
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
PWM1IE: PWM1 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
Unimplemented: Read as ‘0’
Note 1: This bit is unimplemented in dsPIC33FJ06GS101/102 devices.
© 2009 Microchip Technology Inc.
Preliminary
DS70318D-page 115
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