DZPD6710VCB View Datasheet(PDF) - Intel
Part Name
Description
MFG CO.
'DZPD6710VCB' PDF : 138 Pages View PDF
PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers
Npres and Nval are the specific selected prescaler and multiplier value from the timer set’s Setup,
Command, and Recovery Timing registers (see “Timing Registers” on page 84 for a description of
these registers).
From this, a PC Card cycle’s Setup, Command, and Recovery time for the selected timer set are
calculated as follows:
Setup time = (S × Tcp) ± 10 ns
Command time = (C × Tcp) ± 10 ns
Recovery time = (R × Tcp) ± 10 ns
When the internal synthesizer is used, the calculation of the internal clock period Tcp is:
Tcp = TCLKP × 4/7
where TCLKP is the period of the clock supplied to the CLK input pin. An input frequency of
14.318 MHz at the CLK input pin results in an internal clock period of Tcp = 40 ns.
When the internal synthesizer is bypassed, Tcp = TCLKP. An input frequency of 25 MHz in this
circumstance would also result in an internal clock period of Tcp = 40 ns.
The timing diagrams that follow were derived for a PD67XX using the internal synthesizer and a
14.318-MHz CLK pin input. The internal clock frequency of the PD67XX is 7/4 of this incoming
signal (Tcp = 40 ns). The examples are for the default values of the Timing registers for Timer Set
0, as follows:
Timing Register Name
(Timer Set 0)
Setup Timing 0
Command Timing 0
Recovery Timing 0
Index
3Ah
3Bh
3Ch
Value
(Default)
01h
06h
03h
Resultant Npres
1
1
1
Resultant Nval
1
6
3
Thus the minimum times for the default values are as follows:
Default minimum Setup time = (S × Tcp) – 10 ns = {2 × 40 ns} – 10 ns = 70 ns
Default minimum Command time = (C × Tcp) – 10 ns = {7 × 40 ns} – 10 ns = 270 ns
Default minimum Recovery time = (R × Tcp) – 10 ns = {4 × 40 ns} – 10 ns = 150 ns
110
Datasheet
Share Link: 
