E-STE10/100A View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'E-STE10/100A' PDF : 82 Pages View PDF
Registers and descriptors description
STE10/100A
Table 10.
Bit #
12
11
10~6
5
4
3
2
1
0
Transceiver registers description (continued)
Name
Description
10FD
10HD
---
ANC
RF
AN
LINK
JAB
EXT
10BASE-T full duplex ability.
Always 1, since STE10/100A has 10Base-T full
duplex ability.
10BASE-T half duplex ability.
Always 1, since STE10/100A has 10Base-T half
duplex ability.
Reserved
Auto-negotiation completed.
0: Auto-negotiation process incomplete.
1: Auto-negotiation process complete.
Result of remote fault detection.
0: no remote fault condition detected.
1: remote fault condition detected.
Auto-negotiation ability.
Always 1, since STE10/100A has auto-
negotiation ability.
Link status.
0: a link failure condition occurred. Readin clears
this bit.
1: valid link established.
Jabber detection.
1: jabber condition detected (10Base-T only).
Extended register support.
Always 1, since STE10/100A supports extended
register
LL* = Latching Low and clear by read. LH* = Latching High and clear by read.
XR2(offset = bch) - PID1, PHY identifier 1
15~0
PHYID1
Part one of PHY identifier.
Assigned to the 3rd to 18th bits of the
Organizationally Unique Identifier (The ST OUI
is 0080E1 hex).
XR3(offset = c0h) - PID2, PHY identifier 2
15~10
9~4
3~0
Part two of PHY identifier.
PHYID2 Assigned to the 19th to 24th bits of the
organizationally unique identifier (OUI).
Model number of STE10/100A.
MODEL
6-bit manufacturer’s model number.
REV
Revision number of STE10/100A.
4-bits manufacturer’s revision number.
Default
1
1
0
0
0
1
0
0
1
1C04h
000000b
000001b
0000b
RW type
RO
RO
RO
RO
RO/LH*
RO
RO/LL*
RO/LH*
RO
RO
RO
RO
RO
60/82
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