E-TDA7461ND View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

E-TDA7461ND

Car radio signal processor

STMicroelectronics 

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TDA7461

5

I2C bus interface description

I2C bus interface description

5.1

Interface protocol

The interface protocol comprises:

● a start condition (S)

● a chip address byte (the LSB bit determines read/ write transmission)

● a subaddress byte

● a sequence of data (N-bytes + acknowledge)

● a stop condition (P)

Figure 29. Interface protocol diagram

CHIP ADDRESS

SUBADDRESS

DATA 1 to DATA n

MSB

LSB

MSB

LSB

MSB

S 1 0 0 0 1 1 0 R/W ACK X AZ T I A3 A2 A1 A0 ACK

D97AU627

DATA

LSB

ACK P

S = Start

ACK = Acknowledge

AZ = AutoZero-Remain

T = Testing

I = Auto increment

P = Stop

Max. clock speed: 500 kbits/s

The transmitted data is automatically updated after each ACK.

Transmission can be repeated without new chip address.

5.2

Auto increment

If bit I in the subaddress byte is set to "1", the auto increment of the subaddress is enabled.

Table 11. Transmitted data (send mode)

MSB

X

X

X

X

ST

SM

SM = Soft mute activated

ST = Stereo

X = Not used

LSB

X

X

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