EN29F512-45TCP View Datasheet(PDF) - Eon Silicon Solution Inc.
Part Name
Description
MFG CO.
'EN29F512-45TCP' PDF : 35 Pages View PDF
EN29F512
Table 8. AC CHARACTERISTICS
Read-only Operations Characteristics
Parameter
Symbols
JEDEC Standard
Description
Test Setup
Speed Options
-45 -55 -70 -90 Unit
tAVAV
tRC
Read Cycle Time
Min 45 55 70 90 ns
tAVQV
tELQV
tACC
tCE
Address to Output Delay
CE = VIL Max 45 55 70
90
ns
OE = VIL
Chip Enable To Output Delay
OE = VIL Max 45 55 70
90
ns
tGLQV
tOE
Output Enable to Output Delay
Max 25 30 30 35 ns
tEHQZ
tDF
Chip Enable to Output High Z
Max 10 15 20 20 ns
tGHQZ
tAXQX
tDF
Output Enable to Output High Z
Output Hold Time from
tOH
Addresses, CE or OE ,
whichever occurs first
Max 10 15 20 20 ns
Min 0 0 0
0
ns
Notes:
For -45, -55
For all others:
Vcc = 5.0V ± 5%
Output Load : 1 TTL gate and 30pF
Input Rise and Fall Times: 5ns
Input Rise Levels: 0.0 V to 3.0 V
Timing Measurement Reference Level, Input and Output: 1.5 V
Vcc = 5.0V ± 10%
Output Load: 1 TTL gate and 100 pF
Input Rise and Fall Times: 20 ns
Input Pulse Levels: 0.45 V to 2.4 V
Timing Measurement Reference Level, Input and Output: 0.8 V and 2.0 V
This Data Sheet may be revised by subsequent versions 22 ©2003 Eon Silicon Solution, Inc., www.essi.com.tw
or modifications due to changes in technical specifications.
Rev. A, Issue Date: 2003/10/20
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