EP7312-CBZ View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

EP7312-CBZ

High-performance, Low-power, System-on-chip with SDRAM & Enhanced Digital Audio Interface

Cirrus Logic

'EP7312-CBZ' PDF : 55 Pages View PDF

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EP7312
High-Performance, Low-Power System on Chip
Table 22. JTAG Boundary Scan Signal Ordering (Continued)
LQFP PBGA
Pin No. Ball
Signal
Type Position
171
A11
172
G9
173
B11
175
A10
176
F9
177
B10
178
E9
179
A9
184
D8
185
B8
186
E8
187
A7
188
F8
189
B7
191
A6
192
G8
193
B6
194
D7
195
A5
196
E7
199
F7
200
A4
201
D6
202
B4
204
E6
205
A3
206
D5
207
B3
208
A2
A[3]
D[3]
A[2]
D[2]
A[1]
D[1]
A[0]
D[0]
CL2
CL1
FRM
M
DD[3]
DD[2]
DD[1]
DD[0]
nSDCS[1]
nSDCS[0]
SDQM[3]
SDQM[2]
SDCKE
SDCLK
nMWE/nSDWE
nMOE/nSDCAS
nCS[0]
nCS[1]
nCS[2]
nCS[3]
nCS[4]
O
302
I/O
304
O
307
I/O
309
O
312
I/O
314
O
317
I/O
319
O
322
O
324
O
326
O
328
O
330
O
333
O
336
O
339
O
342
O
344
I/O
346
I/O
349
I/O
352
I/O
355
O
358
O
360
O
362
O
364
O
366
O
368
O
370
1) See EP7312 Users’ Manual for pin naming / functionality.
2) For each pad, the JTAG connection ordering is input, output, then enable as applicable.
DS508F2
Copyright Cirrus Logic, Inc. 2011
(All Rights Reserved)
49

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