EVAL-AD1940EB View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-AD1940EB' PDF : 32 Pages View PDF
DIGITAL TIMING DIAGRAMS
BCLK_IN
tBIH
tBIL
tLIS
LRCLK_IN
SDATA_INX
LEFT-JUSTIFIED
MODE
SDATA_INX
I2S-JUSTIFIED
MODE
SDATA_INX
RIGHT-JUSTIFIED
MODE
tSIS
MSB
tSIH
MSB-1
tSIS
MSB
tSIH
8-BIT CLOCKS
(24-BIT DATA)
tSIS
MSB
tSIH
12-BIT CLOCKS
(20-BIT DATA)
14-BIT CLOCKS
(18-BIT DATA)
16-BIT CLOCKS
(16-BIT DATA)
Figure 2. Serial Input Port Timing
BCLK_OUTX
LRCLK_OUTX
SDATA_OUTX
LEFT-JUSTIFIED
MODE
SDATA_OUTX
I2S-JUSTIFIED
MODE
SDATA_OUTX
RIGHT-JUSTIFIED
MODE
tBIH
tBIL
tLOS
ttSSDDDDMS
MSB
MSB-1
ttSSDDDDMS
MSB
ttSSDDDDMS
MSB
8-BIT CLOCKS
(24-BIT DATA)
12-BIT CLOCKS
(20-BIT DATA)
14-BIT CLOCKS
(18-BIT DATA)
16-BIT CLOCKS
(16-BIT DATA)
Figure 3. Serial Output Port Timing
Rev. A | Page 7 of 36
AD1940/AD1941
tLIH
tSIS
LSB
tSIH
tLCH
tTS
LSB
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