EVAL-AD5254EBZ2 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-AD5254EBZ2' PDF : 32 Pages View PDF
AD5253/AD5254
I2C INTERFACE
SCL
t2
SDA
t1
P
S
t8
t6
t9
t3
t4
t7
t8
t9
t2
t5
S
Figure 23. I2C Interface Timing Diagram
t10
P
I2C INTERFACE GENERAL DESCRIPTION
From Master to Slave
From Slave to Master
S = start condition
P = stop condition
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
R/W = read enable at high; write enable at low
S
SLAVE ADDRESS
(7-BIT)
R/W A
INSTRUCTIONS
(8-BIT)
A
DATA
(8-BIT)
0 WRITE
DATA TRANSFERRED
(N BYTES + ACKNOWLEDGE)
Figure 24. I2C—Master Writing Data to Slave
A/A P
S
SLAVE ADDRESS
(7-BIT)
R/W A
DATA
(8-BIT)
A
DATA
(8-BIT)
1 READ
DATA TRANSFERRED
(N BYTES + ACKNOWLEDGE)
Figure 25. I2C—Master Reading Data from Slave
AP
S
SLAVE ADDRESS
(7-BIT)
R/W A
DATA
A/A S
SLAVE ADDRESS
R/W A
DATA
A/A P
READ OR WRITE
(N BYTES +
ACKNOWLEDGE)
REPEATED START
READ
OR WRITE
(N BYTES +
ACKNOWLEDGE)
DIRECTION OF TRANSFER MAY
CHANGE AT THIS POINT
Figure 26. I2C—Combined Write/Read
Rev. B | Page 14 of 32
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