EVAL-AD5372EBZ View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-AD5372EBZ' PDF : 28 Pages View PDF
Pin No.
56
59
63
64
AD5372/AD5373
Mnemonic
SDO
AGND
LDAC
CLR
Description
Serial Data Output. CMOS output. SDO can be used for readback. Data is clocked out on SDO
on the rising edge of SCLK and is valid on the falling edge of SCLK.
Ground for All Analog Circuitry. The AGND pin should be connected to the AGND plane.
Load DAC Logic Input (Active Low). See the BUSY and LDAC Functions section for more
information.
Asynchronous Clear Input (Level Sensitive, Active Low). See the Clear Function section for
more information.
Rev. C | Page 11 of 28
Share Link: 
