EVAL-AD5761RSDZ View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
EVAL-AD5761RSDZ
Analog Devices
'EVAL-AD5761RSDZ' PDF : 35 Pages View PDF
Data Sheet
AD5761R/AD5721R
OUTLINE DIMENSIONS
5.10
5.00
4.90
16
9
4.50
4.40
4.30
1
6.40
BSC
8
PIN 1
1.20
0.15
MAX
0.20
0.05
0.09
0.75
0.30
8°
0.60
0.65
BSC
0.19
COPLANARITY
SEATING
PLANE
0°
0.45
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 78. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
PIN 1
INDICATOR
0.80
0.75
0.70
SEATING
PLANE
3.10
3.00 SQ
2.90
TOP VIEW
SIDE VIEW
0.50
BSC
0.30
0.23
0.18
13
12
DETAIL A
(JEDEC 95)
16
1
PIN 1
INDICATOR AREA OPTIONS
(SEE DETAIL A)
EXPOSED
PAD
1.75
1.60 SQ
1.45
9
4
0.50
0.40
0.30
8
5
BOTTOM VIEW
0.20 MIN
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.20 REF
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6.
Figure 79. 16-Lead Lead Frame Chip Scale Package [LFCSP]
3 mm × 3 mm Body and 0.75 mm Package Height
(CP-16-22)
Dimensions shown in millimeters
Rev. C | Page 35 of 36
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