EVAL-AD73311LEB View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-AD73311LEB' PDF : 36 Pages View PDF
AD73311L
20
0
–20
–40
–60
–80
–100
0
1
2
3
4
5
6
7
FREQUENCY – Hz
؋ 104
Figure 23. Codec Uncompensated Input-to-Output
Frequency Response (fSAMP = 64 kHz)
In the DAC section, increasing the sampling rate by interpola-
tion creates images of the original waveform at intervals of the
original sampling frequency. These images may be sufficiently
rejected by external circuitry, but the sinc-cubed filter in the
interpolator again nulls the output spectrum at integer intervals
of the original sampling rate which corresponds with the images
due to the interpolation process.
The spectral response of a sinc-cubed filter shows the character-
istic nulls at integer intervals of the sampling frequency. Its
passband characteristic (up to Nyquist frequency) features a
roll-off that continues up to the sampling frequency, where the
first null occurs. In many applications this smooth response will
not give sufficient attenuation of frequencies outside the band of
interest, therefore, it may be necessary to implement a final filter
in the DSP which will equalize the passband rolloff and provide
a sharper transition band and greater stopband attenuation.
20
0
–20
–40
–60
–80
–100
0
1
2
3
4
5
6
7
FREQUENCY – Hz
؋ 104
Figure 24. Codec Compensated Input-to-Output
Frequency Response (fSAMP = 64 kHz)
DESIGN CONSIDERATIONS
The AD73311L features both differential inputs and outputs on
each channel to provide optimal performance and avoid common-
mode noise. It is also possible to interface either inputs or outputs
in single-ended mode. This section details the choice of input
and output configurations and also gives some tips towards
successful configuration of the analog interface sections.
ANTIALIAS
FILTER
100⍀
0.047F
0.047F
100⍀
VINP
VINN
0/38dB
PGA
VREF
VOUTP
VOUTN
REFOUT
REFCAP
0.1F
+6/–15dB
PGA
CONTINUOUS
TIME
LOW-PASS
FILTER
REFERENCE
AD73311L
Figure 25. Analog Input (DC-Coupled)
Analog Inputs
The analog input (encoder) section of the AD73311L can be
interfaced to external circuitry in either ac-coupled or dc-coupled
modes.
It is also possible to drive the ADCs in either differential or
single-ended modes. If the single-ended mode is chosen it is
possible, using software control, to multiplex between two single-
ended inputs connected to the positive and negative input pins.
The primary concerns in interfacing to the ADC are firstly to
provide adequate antialias filtering and to ensure that the signal
source will drive the switched-capacitor input of the ADC cor-
rectly. The sigma-delta design of the ADC and its oversampling
characteristics simplify the antialias requirements but it must be
remembered that the single pole RC filter is primarily intended
to eliminate aliasing of frequencies above the Nyquist frequency of
the sigma-delta modulator’s sampling rate (typically 2.048 MHz).
It may still require a more specific digital filter implementa-
tion in the DSP to provide the final signal frequency response
characteristics. It is recommended that for optimum performance
the capacitors used for the antialiasing filter be of high quality
dielectric (NPO). The second issue mentioned above is interfacing
the signal source to the ADC’s switched capacitor input load.
The SC input presents a complex dynamic load to a signal
source, therefore, it is important to understand that the slew
rate characteristic is an important consideration when choosing
external buffers for use with the AD73311L. The internal inverting
op amps on the AD73311L are specifically designed to interface
to the ADC’s SC input stage.
The AD73311L’s on-chip 38 dB preamplifier can be enabled
when there is not enough gain in the input circuit; the preampli-
fier is configured by bits IGS0-2 of CRD. The total gain must be
configured to ensure that a full-scale input signal produces a signal
level at the input to the sigma-delta modulator of the ADC that
does not exceed the maximum input range.
–22–
REV. A
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