EVAL-AD73311LEB View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-AD73311LEB' PDF : 36 Pages View PDF
AD73311L
10F
RB
ELECTRET
MICROPHONE
5V
RA
C1
R2
R1
C2
VINP
VINN
Figure 32 shows an example circuit for providing a single-ended
output with ac coupling. The capacitor of this circuit (COUT) is
not optional if dc current drain is to be avoided.
0/38dB
PGA
VREF
VINP
VINN
VOUTP
VOUTN
REFOUT
REFCAP
CREFCAP
+6/–15dB
PGA
CONTINUOUS
TIME
LOW-PASS
FILTER
REFERENCE
AD73311L
Figure 30. Electret Microphone Interface Circuit
Analog Output
The AD73311L’s differential analog output (VOUT) is pro-
duced by an on-chip differential amplifier. The differential
output can be ac-coupled or dc-coupled directly to a load that
can be a headset or the input of an external amplifier (the speci-
fied minimum resistive load on the output section is 150 Ω). It
is possible to connect the outputs in either a differential or a
single-ended configuration but please note that the effective
maximum output voltage swing (peak to peak) is halved in the
case of single-ended connection. Figure 31 shows a simple circuit
providing a differential output with ac coupling. The capacitors
in this circuit (COUT) are optional; if used, their value can be
chosen as follows:
COUT
=
2π
1
fC RLOAD
where fC = desired cutoff frequency.
VINP
VINN
COUT
VOUTP
RLOAD
VOUTN
COUT
REFOUT
REFCAP
CREFCAP
+6/–15dB
PGA
CONTINUOUS
TIME
LOW-PASS
FILTER
REFERENCE
AD73311L
Figure 31. Example Circuit for Differential Output
COUT VOUTP
RLOAD
VOUTN
REFOUT
REFCAP
CREFCAP
+6/–15dB
PGA
CONTINUOUS
TIME
LOW-PASS
FILTER
REFERENCE
AD73311L
Figure 32. Example Circuit for Single-Ended Output
Differential-to-Single-Ended Output
In some applications it may be desirable to convert the full
differential output of the decoder channel to a single-ended
signal. The circuit of Figure 33 shows a scheme for doing this.
VINP
VINN
RLOAD
RF
RF
VOUTP
RI
VOUTN
RI
REFOUT
REFCAP
CREFCAP
+6/–15dB
PGA
CONTINUOUS
TIME
LOW-PASS
FILTER
REFERENCE
AD73311L
Figure 33. Example Circuit for Differential-to-Single-
Ended Output Conversion
Digital Interfacing
The AD73311L is designed to easily interface to most common
DSPs. The SCLK, SDO, SDOFS, SDI and SDIFS must be
connected to the SCLK, DR, RFS, DT and TFS pins of the
DSP respectively. The SE pin may be controlled from a parallel
output pin or flag pin such as FL0–2 on the ADSP-218x (or XF
on the TMS320C5x) or, where SPORT power-down is not
required, it can be permanently strapped high using a suitable
pull-up resistor. The RESET pin may be connected to the system
hardware reset structure or it may also be controlled using a
dedicated control line. In the event of tying it to the global sys-
tem reset, it is necessary to operate the device in mixed mode,
which allows a software reset, otherwise there is no convenient
way of resetting the device. Figures 34 and 35 show typical
connections to an ADSP-218x and TMS320C5x respectively.
–24–
REV. A
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