EVAL-AD7606SDZ View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
EVAL-AD7606SDZ
Analog Devices
'EVAL-AD7606SDZ' PDF : 36 Pages View PDF
AD7606/AD7606-6/AD7606-4
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
ANALOG INPUT
DECOUPLING CAP PIN
POWER SUPPLY
AVCC 1
AGND 2
OS 0 3
OS 1 4
GROUND PIN
OS 2 5
DATA OUTPUT
PAR/SER/BYTE SEL 6
DIGITAL OUTPUT
DIGITAL INPUT
REFERENCE INPUT/OUTPUT
STBY 7
RANGE 8
CONVST A 9
CONVST B 10
RESET 11
RD/SCLK 12
CS 13
BUSY 14
FRSTDATA 15
DB0 16
PIN 1
AD7606-4
TOP VIEW
(Not to Scale)
48 AVCC
47 AGND
46 REFGND
45 REFCAPB
44 REFCAPA
43 REFGND
42 REFIN/REFOUT
41 AGND
40 AGND
39 REGCAP
38 AVCC
37 AVCC
36 REGCAP
35 AGND
34 REF SELECT
33 DB15/BYTE SEL
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Figure 10. AD7606-4 Pin Configuration
Table 6. Pin Function Descriptions
Mnemonic
Pin No. Type1
AD7606 AD7606-6
1, 37, 38, P
AVCC
AVCC
48
AD7606-4
AVCC
2, 26, 35, P
40, 41, 47
AGND
AGND
AGND
5, 4, 3
DI
OS [2:0]
OS [2:0]
OS [2:0]
6
DI
PAR/SER/ PAR/SER/ PAR/SER/
BYTE SEL BYTE SEL BYTE SEL
7
DI
STBY
STBY
STBY
Description
Analog Supply Voltage, 4.75 V to 5.25 V. This supply voltage is applied to
the internal front end amplifiers and to the ADC core. These supply pins
should be decoupled to AGND.
Analog Ground. These pins are the ground reference points for all analog
circuitry on the AD7606. All analog input signals and external reference
signals should be referred to these pins. All six of these AGND pins should
connect to the AGND plane of a system.
Oversampling Mode Pins. Logic inputs. These inputs are used to select the
oversampling ratio. OS 2 is the MSB control bit, and OS 0 is the LSB control
bit. See the Digital Filter section for more details about the oversampling
mode of operation and Table 9 for oversampling bit decoding.
Parallel/Serial/Byte Interface Selection Input. Logic input. If this pin is tied to
a logic low, the parallel interface is selected. If this pin is tied to a logic high,
the serial interface is selected. Parallel byte interface mode is selected when
this pin is logic high and DB15/BYTE SEL is logic high (see Table 8).
In serial mode, the RD/SCLK pin functions as the serial clock input. The
DB7/DOUTA pin and the DB8/DOUTB pin function as serial data outputs. When
the serial interface is selected, the DB[15:9] and DB[6:0] pins should be tied to
ground.
In byte mode, DB15, in conjunction with PAR/SER/BYTE SEL, is used to select
the parallel byte mode of operation (see Table 8). DB14 is used as the HBEN
pin. DB[7:0] transfer the 16-bit conversion results in two RD operations,
with DB0 as the LSB of the data transfers.
Standby Mode Input. This pin is used to place the AD7606/AD7606-6/
AD7606-4 into one of two power-down modes: standby mode or shutdown
mode. The power-down mode entered depends on the state of the RANGE
pin, as shown in Table 7. When in standby mode, all circuitry, except the on-
chip reference, regulators, and regulator buffers, is powered down. When
in shutdown mode, all circuitry is powered down.
Rev. 0 | Page 13 of 36
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